1. Field of the Invention
This invention relates to an electrical load driving circuit with protection.
2. Description of the Prior Art
An electrical load driving circuit including a MOS transistor for turning on and off the electrical passage supplying a driving power to an electrical load is known. Moreover, an electrical load driving circuit having a protection 12 is a schematic circuit diagram of such a prior art electrical load driving circuit including such a protection circuit. This electrical load driving circuit 90 includes an N channel MOS transistor Tr0 as a high side switch on the passage from a positive electrode of a dc power supply 2 to an electrical load 4. The MOS transistor Tr0 is turned on and off in accordance with a control signal supplied to the gate of the MOS transistor Tr0 to drive the electrical load 4
The drain of the MOS transistor Tr0 is connected to the positive terminal of the dc power supply 2 through a connection terminal TB and the source of the MOS transistor Tr0 is connected to one terminal of the electrical load 4 through a connection terminal TL. Moreover, between the gate and the source of the MOS transistor Tr0, a resistor R0 for reducing the impedance between the gate and the source to stabilize the turning-on and turning-off operations of the MOS transistor Tr0 is provided.
In the electrical load driving circuit 90, the MOS transistor Tr0 turns on when a gate potential of the MOS transistor Tr0 is higher than a source potential by a voltage MOS transistor Tr0 is supplied with a positive voltage through a switch SW (for example, a transistor) which is controlled in accordance with a switch control signal.
In this electrical load driving circuit 90, a high voltage terminal TL to the electrical load 4 or the terminal Ta connected to the electrical load 4 due to electrostatic charges developed at the human body or at the other equipment. If such a high voltage noise is applied to the MOS transistor Tr0, the drain-source voltage of the MOS transistor may be higher than the withstanding voltage, so that the MOS transistor Tr0 may be destroyed or the characteristic of the MOS transistor may be deteriorated. Japanese Patent application provisional publication NO. 59-181722 discloses a protection circuit for a prior art electrical load driving circuit.
This protection circuit is applied to the electrical load driving circuit 90. The protection circuit comprises a diode Da, the cathode being connected to the line to which the high voltage noise is applied, the anode being connected to the ground and an NPN transistor Tra of which collector is connected to the line, and a resistor Ra of which both ends are connected to the base and the emitter of the NPN transistor Tra.
In this protection circuit, if a positive electrostatic charge which is higher than the ground potential is applied to the terminal Ta, the voltage difference between the collector and the base of the NPN transistor Tra may exceed the collector-base breakdown voltage. Then, breakdown between the collector and the base occurs. This current acts as the base current of the NPN transistor Tra, so that the NPN electrostatic charge developed at the terminal Ta follows the NPN transistor Tra as the collector current of the NPN transistor Tra.
On the other hand, if a negative electrostatic charge of which potential is lower than the ground potential is applied to the terminal Ta, the potential of the cathode becomes lower than the ground potential, so that the negative electrostatic charge flows through the diode Da in the forward direction and its energy is consumed.
As mentioned above, the protection circuit provided to the electrical load driving circuit 90 can suppress the current developed by the high voltage noise on the side of the electrical load 4 to protect the MOS transistor Tr0 from high voltage noises.
However, in the above-mentioned protection circuit, there is the possibility that the protection circuit cannot absorb all current due to the high voltage noise, so that the remaining current may destroy the MOS transistor Tr0. This is because, current capacities of the NPN transistor Tra and the diode Da are insufficient or there is an inductance component on the line to the protection circuit.
More specifically, if a high voltage noise is applied to the terminal Ta and if all current due to the high voltage noise cannot be absorbed by the NPN transistor Tra, a parasitic diode D0 (shown by chain lines in FIG. 12) existing between the drain and the source of the MOS transistor Tr0 absorbs the remaining current. That is, the parasitic diode D0 bypasses the remaining current. Accordingly, the electrical load driving circuit 90 shown in FIG. 12 shows relatively high positive noise withstandingness.
On the other hand, if a negative high voltage noise is applied to the terminal Ta and if the diode Da cannot flow all current due to the high voltage noise, the MOS transistor Tr0 can flow the remaining current therethrough from the drain to the source when the MOS transistor Tr0 is turning on. Thus, the voltage developed between the drain and the source is relatively small, so that the MOS transistor Tr0 is not destroyed.
However, if a high negative noise is applied to the terminal Ta while the MOS transistor Tr0 is in the OFF state, the voltage of the source of the MOS transistor Tr0 largely decreases because there is no passage flowing the not-absorbed current in the circuit. In this condition, if a voltage between the drain and the source which is greater than the withstanding voltage of the MOS transistor Tr0 is developed due to the decrease in the voltage of the source, the MOS
As mentioned above, in the above-mentioned prior art protection circuit there may be the case that the protection circuit cannot protect the MOS transistor from the high voltage noise. In consideration of this fact, it may be better that current capacities of the elements in the protection circuit are increased. However, in this case, areas for these elements on an integrated circuit will be increased.
The aim of the present invention is to provide a superior electrical load driving circuit.
According to the present invention;a first aspect of the present invention provides an electrical load driving circuit comprising: a MOS transistor having first and second electrodes and a gate electrode controlling a channel between said first and second electrodes, for turning on and off a circuit including a driving power supply and an electrical load in accordance with a control signal via said gate electrode with a predetermined polarity in a voltage difference between a drain and a source of said MOS transistor with respect to one of positive and negative terminals of said driving power supply; a first clamping circuit for clamping a first voltage difference between said first and second electrodes to a first predetermined voltage when a high voltage is externally developed between said first and second electrodes, a polarity of said high voltage being the same as said predetermined polarity; and a second clamping circuit for clamping said gate electrode of said MOS transistor to a second predetermined voltage with respect to said one of positive and negative terminals of said driving power supply when said high voltage is externally developed.
Preferably, said MOS transistor comprises an N channel MOS transistor, said second electrode is coupled to said positive terminal of said driving power supply, said negative terminal of said driving power supply is connected to the ground, said second electrode is coupled to said electrical load, said second clamping circuit is provided between said gate electrode and the grounds and said second predetermined voltage is lower than the ground potential by a predetermined voltage and higher than a potential of said second electrode when said high Voltage is externally developed.
In this case, said first clamping circuit may comprise a zener diode of which anode is connected to said first electrode, and a cathode of said zener diode is connected to said second electrode. Moreover, this electrical load driving circuit may further comprise a third clamping circuit including: an NPN transistor of which collector connected to said first terminal and a resistor provided between a base of said NPN transistor and said second terminal, an emitter of said NPN transistor being connected to said second terminal, wherein said NPN transistor turns on when said high voltage is externally developed.
In that case, the electrical load driving circuit may further comprise a third clamping circuit including: an NPN transistor of which collector connected to said first terminal and a resistor provided between a base of said NPN transistor and said second terminal, an emitter of said NPN transistor being connected to said second terminal, wherein said NPN transistor turns on when said high voltage is externally developed. Moreover, the electrical load driving circuit may further comprise a fourth clamping circuit provided between said first electrode and said gate electrode for, when said voltage of said gate electrode is lower than a voltage of said first electrode by a second predetermined voltage, holding said voltage of said gate electrode.
In that case, said second clamping circuit may comprise a diode and an NPN transistor connected to said diode in parallel, a cathode of said diode being connected to said gate electrode, an anode of said diode being connected to the ground, an emitter of said NPN transistor being connected to the ground, a collector of said NPN transistor being connected to said gate electrode of said MOS transistor. Moreover, said second clamping circuit may include: an n type layer on said substrate; a first p type diffusion region in said n type layer; a first n type diffusion region in said n type layer; a second p type diffusion region which are separated from each other with said n type layer; and a second n type diffusion region in said first p type diffusion region, wherein said diode is provided by said second p type diffusion region and said n type layer, said collector of said NPN transistor is provided by said first n type diffusion region, said base of said NPN transistor is provided by said first p type diffusion region, said emitter of said NPN transistor is provided by said second n type diffusion region, said anode of said diode is provided by said second p type diffusion region, said cathode of said diode is provided by said n type layer, wherein said cathode of said diode is connected to said collector of said NPN transistor by said n type layer. Moreover, preferably, the electrical load driving circuit may further comprise a semiconductor structure including a p type substrate, a p type surrounding wall on said p type substrate, an n type layer within said p type substrate and said surrounding wall, and a transistor circuit portion in said n type layer providing said NPN transistor, wherein said diode is provided by said p type surrounding wall and said n type layer.